In silicon photovoltaics, a significant barrier to continued development is the shadowing of the surface of the silicon wafer by the frontside metallisation grid, which will typically block light from reaching about 8% of the wafer. This shadowing loss cannot simply be mitigated by reducing the number of conductors or by spacing the conductors more widely, as this would result in further efficiency losses, primarily due to the increase in resistance across the silicon between the conductors. Although this trade-off between shadowing and resistance seems to leave little room for improvement, the present inventor has recognized that refinements can still be made to give credible efficiency gains.